Huawei Bets on 'Tau's Law' to Mass-Produce 1.4nm Chips Despite US Curbs

Workaround Achievable Without EUV Yield, Cost, and Power Consumption Remain Challenges Success Could Narrow Gap with Samsung to 2-3 Years

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By Park Si-jin
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Huawei semiconductor substrate. Yonhap News - Seoul Economic Daily International News from South Korea
Huawei semiconductor substrate. Yonhap News

China's Huawei has announced plans to mass-produce 1.4-nanometer (one-billionth of a meter) class semiconductors based on "Tau's Law," instead of the Moore's Law that the global chip industry has long followed. Huawei currently mass-produces 7-nanometer-class chips and aims to narrow its gap with TSMC, the world's largest foundry, and Samsung Electronics. As US sanctions intensify across the board, China is accelerating its push for indigenous technology development and supply chain self-reliance.

null - Seoul Economic Daily International News from South Korea

According to Greater China media reports on the 26th, He Tingbo, president of HiSilicon, said at the IEEE International Symposium on Circuits and Systems (ISCAS 2026) held in Shanghai on the 25th that Huawei will implement 1.4-nanometer-class transistor density by 2031 by applying its next-generation chip architecture "Logic Folding." TSMC has set 2028 and Samsung Electronics 2029 as their target years for 1.4-nanometer-class mass production, meaning Huawei has unveiled a goal of narrowing the gap with these companies to two or three years.

What draws attention is Huawei's stated approach of implementing Logic Folding without extreme ultraviolet (EUV) lithography equipment. EUV, virtually monopolized by ASML, is essential equipment for advanced processes at 5 nanometers and below, but Huawei's access has been blocked by US export controls.

The theoretical basis Huawei has put forward is the "Tau (τ, time constant) scaling law." While Moore's Law focuses on transistor miniaturization, Tau scaling concentrates on optimizing internal circuit and data transmission structures within the chip to reduce signal propagation time.

Reducing signal time and stacking dies or chiplets in three dimensions is an approach the semiconductor industry has been pursuing. However, among 3D stacking technologies, Huawei devised Logic Folding, which folds circuits vertically to shorten wiring length. The picture changes if a system has been built that reduces latency across the entire process — from transistors to circuit design, chip architects, and system engineers.

Huawei plans to apply Logic Folding for the first time in the Kirin chip of its "Mate 90" smartphone series in the second half of this year, and expand it to the Ascend 990 artificial intelligence (AI) accelerator in 2030. However, President He acknowledged that to deliver sufficient effects, the company must secure yields close to 100% through reduced hybrid bonding spacing and intelligent redundancy design.

Some in the industry say it is too early to judge commercialization. Yield, cost, and power consumption issues that arise from the folding method remain challenges to be solved. Huawei, together with SMIC, produces 7-nanometer and 5-nanometer processes using older deep ultraviolet (DUV) equipment, but yields for 5-nanometer are significantly low. Its proprietary platform Ascend is also expanding its presence in the domestic market but has been unable to overcome the wall of Nvidia's "CUDA" overseas.

Choi Jae-hyouk, professor of next-generation intelligent semiconductor at Seoul National University's Department of Convergence Sciences, said, "It has considerable potential and is fundamentally a sound technology," but added, "When transistors are folded upward, heat generation becomes severe, and if the upper and lower layers do not align precisely, yields will also drop."

Nevertheless, China's chip self-sufficiency drive — staked on its survival — is hard to ignore. Against the US blockade, China is forging its own breakthroughs across the entire supply chain, including materials, equipment, design, and manufacturing. The Shanghai AI Laboratory has succeeded in stable production of advanced krypton fluoride (KrF) photoresist resin, and Dinglong New Materials completed a photoresist plant in March and began mass production. The localization rate of core equipment rose to 35% as of early this year.

Nvidia CEO Jensen Huang, immediately after the first-quarter earnings announcement on the 20th of this month, mentioned the US export controls on AI semiconductors and admitted, "We have ceded the China market to Huawei." ASML CEO Christophe Fouquet, whose path to China exports is also blocked, warned in an interview with Reuters the same day, "Tightening regulations further will instead accelerate China's development of its own equipment."

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Original reporting by Park Si-jin for Seoul Economic Daily.

AI-translated from Korean. Quotes from foreign sources are based on Korean-language reports and may not reflect exact original wording.

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